FPGA Verification Engineer :: Santa Clara, CA
Company: STI
Location: Santa Clara
Posted on: April 3, 2026
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Job Description:
Mandatory Areas Must Have Skills – FPGA Verification Engineer
Skill 1 – 8 Years of in FPGA Skill 2 – 5 Years of Exp in UVM Skill
2 – 5 Years of Exp in System Verlilog Location – Santa Clara, CA
Onsite Requirement - Y/N- Y Number of days onsite – 5 Days If
Onsite – Office Address – Job Description: We are seeking a highly
motivated and skilled FPGA Verification Engineer to join our
dynamic team. In this role, you will be responsible for the
verification of complex FPGA designs, ensuring their functionality,
performance, and reliability. You will work closely with design
engineers to develop and execute verification plans, identify and
debug issues, and contribute to the overall quality of our
products. Key Responsibilities: • Develop and execute comprehensive
verification plans for FPGA designs. • Create and maintain test
benches using industry-standard verification methodologies (e.g.,
UVM, SystemVerilog). • Write and debug test cases to verify
functionality, performance, and corner cases. • Perform code
coverage and functional coverage analysis. • Identify and debug
issues, working closely with design engineers to resolve them. •
Document verification results and provide clear and concise
reports. • Participate in design reviews and contribute to the
overall verification strategy. • Stay up-to-date with the latest
verification methodologies and tools. Skills Required: • Strong
understanding of FPGA design principles and architectures. •
Proficiency in SystemVerilog and UVM verification methodology. •
Experience with industry-standard verification tools (e.g.,
QuestaSim, Synopsys VCS). • Knowledge of code coverage and
functional coverage analysis. • Excellent debugging and
problem-solving skills. • Strong communication and collaboration
skills. Requirements • Bachelor's or Master's degree in Electrical
Engineering, Computer Engineering, or a related field. • 3 years of
experience in FPGA verification. • Experience with scripting
languages (e.g., Python, Perl). • Familiarity with hardware
description languages (e.g., VHDL, Verilog).
Keywords: STI, Salinas , FPGA Verification Engineer :: Santa Clara, CA, IT / Software / Systems , Santa Clara, California
